Characterization of a Fault-Tolerant RISC-V System-on-Chip for Space Environments
Douglas A. Santos, André Martins Pio de Mattos, Douglas R. Melo, Luigi Dilillo
Abstract
Processing units are sensitive to the harsh radiation conditions present in space applications. Thus, radiation testing is a mandatory step toward high reliability for these systems. Notably, as an emerging processor architecture, RISC-V has attained interest for its utilization in these applications. For this reason, in previous work, we presented a fault-tolerant RISC-V System-on-Chip (SoC) with enhanced fault awareness, known as HARV-SoC, to attend to this increasing demand. The SoC includes structures to detect, correct, and report radiation-induced errors. In this work, we characterize HARV-SoC under proton irradiation, enabling the proposition of space applications based on a low-cost and open-source RISC-V solution. We observed and reported the effects of Single Event Effects (SEEs) and Total Ionizing Dose (TID) in the entire SoC, individually evaluating the HARV core, SoC elements, and external memories, with a detailed analysis of error propagation.