First Demonstration of a Monolithic SiC Power IC Integrating a Vertical MOSFET with a CMOS Gate Buffer
Mitsuo Okamoto, Atsushi Yao, Hiroshi Sato, Shinsuke Harada
Abstract
In this study, we have realized a monolithic silicon carbide (SiC) power integrated circuit (IC) integrating a 1.2 kV-class trench gate vertical metal-oxide-semiconductor field-effect transistor (MOSFET) and a complementary metal-oxide-semiconductor (CMOS) gate buffer aiming to enhance the fast switching by eliminating the parasitic effects caused by external interconnections. The p-MOSFETs in SiC CMOS were balanced with n-MOSFETs using an epitaxial buried channel structure. The integrated SiC CMOS gate buffer allowed to control the vertical power MOSFET successfully. A breakdown voltage of around 1500 V was obtained, and a switching operation at 600 V and 10 A was achieved with a rise time of 24 ns and fall time of 28 ns.