Importance of source and drain extension design in cryogenic MOSFET operation: causes of unexpected threshold voltage increases
Takumi Inaba, Hidehiro Asai, Junichi Hattori, Koichi Fukuda, Hiroshi Oka, Takahiro Mori
Abstract
Abstract Increased threshold voltages have been observed during linear-mode operation of short-channel bulk metal-oxide-semiconductor field-effect transistors (MOSFETs) employing shallow source and drain extension technology at cryogenic temperatures. These increases were suppressed during saturation-mode operation, which resulted in the increase of a threshold voltage variation between linear- and saturation-modes as if drain-induced barrier lowering occurred. Numerical simulations revealed that these increases originate from enhanced depletion in the extension region and subsequent increases in channel resistance at cryogenic temperatures. These data suggest that shallow extensions should be designed more carefully in the case of MOSFETs intended for cryogenic operation.