A Miniaturized Wireless Neural Implant With Body-Coupled Power Delivery and Data Transmission
Changuk Lee, Byeongseol Kim, Jejung Kim, Sangwon Lee, Taejune Jeon, Woojun Choi, Sunggu Yang, Jong‐Hyun Ahn, Joonsung Bae, Youngcheol Chae
Abstract
This article presents a wireless neural implant with body-coupled (BC) data transmission and power delivery for freely behaving animals and incorporates a precision front end for high-quality neural recordings. The neural implant utilizes the body as a wireless transmission medium where it only needs small electrodes for data transmission and power delivery. An external device with patch electrodes can then be placed far away from the implant without the need for precise alignment. Furthermore, a four-channel continuous-time delta–sigma modulator (CT- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta \Sigma \text{M}$ </tex-math></inline-formula> ) is integrated into the system for precision neural recordings. Each neural recording CT- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta \Sigma \text{M}$ </tex-math></inline-formula> achieves an 82.3-dB signal-to-noise and distortion ratio (SNDR) and an 83.3-dB dynamic range (DR) while consuming only 8.6- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> at a signal bandwidth of 10 kHz. The neural implant integrated circuit (IC) is fabricated in a 0.11- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS with a high-density capacitor option, and the BC data receiver (RX) IC is implemented in a 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS. The implant IC occupies a chip area of 4 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text {mm}^{2}$ </tex-math></inline-formula> , including a 5-nF on-chip capacitor, and draws 280 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{A}$ </tex-math></inline-formula> from a 2.3-V supply with a working data transmitter (TX) electrode. By exploiting direct-digital signaling for data transmission, the neural implant achieves a data rate of 20.48 Mb/s and a wireless power recovery of 644 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> , resulting in an energy efficiency of 32 pJ/b. The entire neural implant system has been successfully verified by both electrical and in vivo measurements, while the wirelessly recorded electrocorticography (ECoG) signals with the prototype neural implant inside a rat demonstrate the end-to-end functionality of the proposed system.