Non-Volatile Majority Function Logic Using Ferroelectric Memory for Logic in Memory Technology
Junghyeon Hwang, Sehee Lim, Giuk Kim, Seong‐Ook Jung, Sanghun Jeon
Abstract
We demonstrate that a non-volatile majority function logic is formed by a 1T-nC <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{storage}$ </tex-math></inline-formula> -1C <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{read}$ </tex-math></inline-formula> cell in which a hafnia ferroelectric capacitor is used for computing in memory ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CiM</i> ) and nonvolatile logic-in-memory (NV- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LiM</i> ). We show a write operation of low voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$< 3\text{V}$ </tex-math></inline-formula> ) and high speed (< 20ns), with improved <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\vphantom {_{\int }}$ </tex-math></inline-formula> endurance characteristics over 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> cycles by adopting a novel write and read method. We performed a circuit-level analysis of an NV 1bit full adder. This adder achieves a power-delay-area product that is 4.8 and 53.5 times higher than the previous FeFET-based 1bit full adder when approximate computing is excluded and applied, respectively.