RVfpga: Using a RISC-V Core Targeted to an FPGA in Computer Architecture Education
Sarah Harris, Daniel Chaver, Luís Piñuel, José Ignacio Gómez, M. Hamza Liaqat, Zubair L. Kakakhel, Olof Kindgren, Robert Owen
Abstract
RISC-V FPGA, also written RVfpga, is a set of two freely available courses developed by the authors and Imagination Technologies that enable users to understand and use the RISC-V instruction set architecture (ISA), a commercial RISC-V core and system, and the RISC-V ecosystem. The first course, RVfpga, includes comprehensive instructions, tools, and labs for targeting a commercial RISC-V processor to a field programmable gate array (FPGA) and then using and expanding it to learn about computer architecture, digital design, embedded systems, system-on-chip (SoC) design, and programming. The topics covered include targeting the RISC-V SoC to an FPGA, programming in C and RISC-V assembly, running programs in simulation or, optionally, in hardware, using peripherals and adding new ones to the SoC, and analyzing and modifying the RISC-V core and memory system, including adding new instructions to the core. The follow-on course, RVfpga-SoC, shows how to build a RISC-V SoC from building blocks and then run the Zephyr real-time operating system (RTOS) on it. At the completion of these courses, users will have a working RISC-V system and have hands-on experience exploring and using both the RISC-V SoC and the RISC-V toolchain, including compilers and simulators.