Large-Scale Fabrication of Submicrometer-Gate-Length MOSFETs With a Trilayer PtSe<sub>2</sub> Channel Grown by Molecular Beam Epitaxy
Kuanchen Xiong, Maria Hilse, Lei Li, Alexander Göritz, Marco Lisker, Matthias Wietstruck, Mehmet Kaynak, Roman Engel‐Herbert, A. Madjar, James C. M. Hwang
Abstract
This article is the first report of MOSFETs fabricated on PtSe2 grown by molecular beam epitaxy. Both material synthesis and device fabrication are done below 450 °C-the thermal budget of CMOS back-end-of-line processes. The MOSFETs are batch-fabricated by a CMOS-compatible process on 200-mm-diameter Si substrates prepared by a state-of-the-art BiCMOS foundry. With three monolayers of PtSe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> , an n-type MOSFET exhibits a current ON/OFF ratio of 43 at room temperature, which increases to 1600 at 80 K. These results are among the best of transistors based on synthesized PtSe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> . Despite the thin PtSe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> layer, doping by contact bias lowers the contact resistance significantly and boosts the current capacity and the ON/OFF ratio. Temperature-dependent current-voltage characteristics imply a bandgap of approximately 0.2 eV, which confirms that the semiconductor-semimetal transition of PtSe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> is not as abrupt as originally predicted. Better MOSFET performance can be expected by growing even thinner PtSe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> uniformly and by thickening the PtSe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> in the contact regions.