Low Voltage and High Speed 1Xnm 1T1C FE-RAM with Ultra-Thin 5nm HZO
Minchul Sung, Kwangmyoung Rho, Ja-Yong Kim, Jun-Ho Cheon, Ki‐Young Choi, Dohee Kim, Hoseok Em, Gyeongcheol Park, Jungwook Woo, Yeongyu Lee, Jae‐Hyeon Ko, Moonhoi Kim, Gwangyeob Lee, Seung Wook Ryu, Dong Sun Sheen, Yangsung Joo, Seiyon Kim, Chang Hyun Cho, Myung-Hee Na, Jinkook Kim
Abstract
World-first 1Xnm half-pitch FE-RAM with 8Gb density was fabricated, and operation was confirmed. The conventional FE-RAM maximizes 2Pr by adjusting the capacitor plate voltage according to the data. In this study, despite using a fixed capacitor plate voltage, we showed that memory operation is possible even at a low voltage of ±0.6V by using the pinched hysteresis of 5nm-thick ultra-thin HZO. We measured the switching speed by changing the write time from 5ns to 80ns. 70% of the total polarization can be switched within 20ns tWR (like the DRAM), and the remaining 30% responds to a wide range of write time between 20 and 80ns. For improving the switching speed, it is necessary to reduce bulk defects or design schemes such as Vcore overdrive.