SIBAM—Sign Inclusive Broken Array Multiplier Design for Error Tolerant Applications
Avishek Sinha Roy, Anindya Sundar Dhar
Abstract
Approximate computing has emerged as a promising technique to develop energy efficient design solutions for error-tolerant applications. Many research efforts have been directed towards proposing approximations in power-hungry multiplier circuits. In this brief, we have introduced two variants of a broken array approximate booth multiplier design called SIBAM with partial error correction through discarded sign bit addition. Experimental results show that up to 63% of energy savings can be achieved compared to accurate multipliers with Mean Relative Error Distance (MRED) constrained at 1.5%. Moreover, extensive analysis shows that the proposed design outperforms state-of-the-art multipliers with energy savings achievable up to 24% at 0.3% MRED constraint.