Charge Balance Design of 1200-V E-Mode p-GaN Gate HEMT Toward Enhanced Breakdown Voltage and Dynamic Stability
Junjie Yang, Jingjing Yu, Jiawei Cui, Sihang Liu, Teng Li, Yunhong Lao, Hao Chang, Maojun Wang, Jinyan Wang, Xiaosen Liu, Jin Wei, Bo Shen
Abstract
This work investigates the charge balance design of the 1200-V E-mode lateral superjunction p-GaN gate HEMT (SJ-HEMT) on sapphire substrate. The charge balance is formed through the alternative p-/n-pillars; the p-pillars are thinned p-GaN stripes, and the n-pillars are 2DEG stripes. The charge balance design on the static and dynamic performance of the SJ-HEMT was investigated by tuning the width of p-/n-pillars. The SJ-HEMT with charge balance yields a BV of 2655 V and a high BV/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{\text {GD}}$ </tex-math></inline-formula> ratio of 1.56 MV/cm. Notably, the SJ-HEMT demonstrates effective suppression of trapping effects, which exhibits a strong correlation with the gap between two p-pillars. At charge balance design, the SJ-HEMT presents an excellent dynamic <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {ON}}$ </tex-math></inline-formula>/static <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {ON}}$ </tex-math></inline-formula> ratio of 1.28 under <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {DS}}$ </tex-math></inline-formula> stress up to 1200 V. Our study also indicates a scaling of p-/n-pillars can further improve the dynamic <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {ON}}$ </tex-math></inline-formula> performance. This work underscores the merits of charge-balanced design for high-performance 1200-V E-mode GaN power transistors.