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A 4A 12-to-1 Flying Capacitor Cross-Connected DC-DC Converter with Inserted D>0.5 Control Achieving >2x Transient Inductor Current Slew Rate and 0.73× Theoretical Minimum Output Undershoot of DSD

Tingxu Hu, Mo Huang, Yan Lu, Rui P. Martins

20222022 IEEE International Solid- State Circuits Conference (ISSCC)39 citationsDOI

Abstract

Automotive and industrial applications require a high-efficiency DC-DC converter to directly convert power from the 12V intermediate bus to a low-voltage point-of-load (PoL). The double step-down (DSD) buck converter [1]–[4] (shown in Fig. 18.3.1) is suitable for such applications, where a flying capacitor <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$C_{\mathrm{F}}$</tex> sustains a half-input-voltage <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(V_{\text{IN}}/2)$</tex> stress. Therefore, all the power switches only experience <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{\text{IN}}/2$</tex> stress except <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$M_{\mathrm{A}2}$</tex> , allowing for exploiting the benefits of low-voltage devices. Two pulse-width modulation (PWM) signals <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\phi_{1}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\phi_{2}$</tex> with an equal duty cycle <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$D$</tex> drive the DSD. A <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{PoL}$</tex> supply should have a small output capacitor <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$C_{0}$</tex> if a fast dynamic voltage scaling (DVS) is needed. However, a small <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$C_{0}$</tex> in the conventional DSD may cause a large output undershoot <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{\text{US}}$</tex> during a transient event. This comes from the low inductor current slew rate <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$I_{\mathrm{L}_{-}\text{SR}}=(V_{\text{IN}}/2-2V_{0})/L$</tex> , due to the amplitude of the inductor switching nodes <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{\text{XA}1}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{\text{XB}1}$</tex> being reduced to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{\text{IN}}/2$</tex> by <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$C_{\mathrm{F}}$</tex> , and the non-overlapping <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\phi_{1}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\phi_{2}$</tex> in a conventional <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$D\leq 0.5$</tex> control. Furthermore, the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$D$</tex> should cover a wide range to respond to an integral transient error in the control loop compensator. With <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$D\leq 0.5$</tex> , the DSD converter may fail to cancel the error in time, and the accumulation and release of the error result in overshoot/ringing. This would be more severe at a higher output voltage <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{0}$</tex> because the steady-state <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$D$</tex> is closer to 0.5. A possible solution can be to have a DSD converter that works with <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$D&gt;0.5$</tex> . Nevertheless, this leads to an over-sterss on <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$M_{\mathrm{A}1}$</tex> , and imbalance in inductor currents <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$I_{\text{LA}}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$I_{\text{LB}}$</tex> , which should be eliminated [3].

Topics & Concepts

CapacitorComputer scienceDuty cycleTopology (electrical circuits)Electrical engineeringVoltageEngineeringAdvanced DC-DC ConvertersSilicon Carbide Semiconductor TechnologiesMultilevel Inverters and Converters
A 4A 12-to-1 Flying Capacitor Cross-Connected DC-DC Converter with Inserted D&gt;0.5 Control Achieving &gt;2x Transient Inductor Current Slew Rate and 0.73× Theoretical Minimum Output Undershoot of DSD | Litcius