Design of Partial Discharge Real-Time Capture System
Yu‐En Wu
Abstract
This paper presents an online partial discharge real-time capture system whose system architecture includes Field-programmable Gate Array (FPGA) components, a Human–Machine Interface (HMI), and analog amplifying circuits. The analog amplify circuit is designed to achieve a magnification rate of 10 times and a bandwidth of 100 MHz. The software developed in this work can be used for real-time online monitoring, recording, and analysis of partial discharge. The captured signal of the partial discharge was analyzed by the FPGA by using a fast Fourier transform, time–frequency map, and phase-resolved partial discharge, and the results were transmitted through the RS-232 to the HMI for display. System stability is improved through data analysis to determine possible causes of partial discharge, averting both user risk and damage to equipment.