Design of joint reconfigurable hybrid adder and subtractor using FinFET and GnrFET technologies
D. Rebecca Florance, B. Prabhakar
Topics & Concepts
SubtractorAdderMultiplexerCMOSCarry-save adderComputer scienceSerial binary adderElectronic engineeringRetimingParallel computingEngineeringMultiplexingAdvancements in Semiconductor Devices and Circuit DesignQuantum-Dot Cellular AutomataAdvanced Memory and Neural Computing