Mixed‐Halide Perovskite Memristors with Gate‐Tunable Functions Operating at Low‐Switching Electric Fields
Konstantinos Rogdakis, Konstantinos Chatzimanolis, George Psaltakis, Nikolaos Tzoganakis, Dimitris Tsikritzis, Thomas D. Anthopoulos, Emmanuel Kymakis
Abstract
Abstract Crossbar circuits based on two terminal (2T) memristors typically require an additional unit such as a transistor for individual node selection. A memristive device with gate‐tunable synaptic functionalities will not only integrate selection functionality at the cell level but can also lead to enriched on‐demand learning schemes. Here, a three‐terminal (3T) mixed‐halide perovskite memristive device with gate‐tunable synaptic functions operating at low potentials is demonstrated. The device operation is controlled by both the drain ( V D ) and gate ( V G ) potentials, with an extended endurance of >2000 cycles and a state retention of >5000 s. Applying a voltage ( V set ) of 20 V across the 50 µm channel switches its conductance from a high‐resistance state (HRS) to a low‐resistance state (LRS). A memristive switching mechanism is proposed that is supported by current injection models through a Schottky barrier and Kelvin probe force microscopy data. The simultaneous application of a V G potential is found to further modulate the channel conductance and reduce the operating V set to 2 V, thus requiring a low electric field of 400 V cm −1 , which is by a factor of 50× less compared to state‐of‐the‐art literature reports. Gate‐tunable retention, endurance, and synaptic functionalities are demonstrated, further highlighting the beneficial effect of V G on device operation.